. De-xilinx-peuvent-Être-utilisés, en utilisant un PC pour effectuer les traitements logiciels Pour les tests préliminaires des IP sur carte de développement, une carte ALTERA permet d'utiliser un module caméra enfichable directement sur la carte. Cette carte disposant d'un FPGA trop petit pour l'architecture matérielle proposée, elle sera utilisée pour la validation d'IP individuelle, mais pas l

I. Les, F. Précédemment-sont-synthétisées-pour-un, and . Kintex, cette technologie étant utilisée pour la partie FPGA des circuits Zynq de Xilinx (les circuits Zynq n'étant pas proposés à la synthèse dans la version utilisée de Xilinx ISE) On synthétisera les IP sur le FPGA le plus proche du plus gros Zynq (Z-7045) : le Kintex 7 XC7K355T, Le tableau 5.2 présente les ressources disponibles sur les quatre circuits Zynq. Circuit Cellules logiques BRAM (kb/blocs 36kb), pp.48-49

L. Alba, R. Domínguez-castro, F. Jiménez-garrido, S. Espejo, S. Morillas et al., Rodríguez-Vázquez : Spatial Temporal Patterns for Action-Oriented Perception in Roving Robots, chapitre 8, Virtex 6. Cette utilisation de ressources du FPGA appelle un circuit Zynq de type Références New Visual Sensors and Processors, pp.351-369, 2009.

J. D. Anderson, D. J. Lee, and J. K. Archibald, FPGA implementation of vision algorithms for small autonomous robots, Intelligent Robots and Computer Vision XXIII: Algorithms, Techniques, and Active Vision, pp.23-26, 2005.
DOI : 10.1117/12.632029

. Altera, Strategic considerations for emerging soc fpgas. White paper, Altera, Febuary 2011, p.44

A. Nabil-belbachir-herbert-bay and A. Ess, Tinne Tuytelaars et Luc Van Gool : Speeded-up robust features (surf) Computer Vision and Image Understanding, Similarity Matching in Computer Vision and Multimedia, pp.37346-359, 2008.

R. Bolduc and D. Martin, Levine : A review of biologically motivated space-variant data reduction models for robotic vision

V. Bonato, E. Marques, and G. A. , Constantinides : A parallel hardware architecture for scale and rotation invariant feature detection . Circuits and Systems for Video Technology, IEEE Transactions on, vol.18, issue.34, pp.1703-1712, 2008.

K. Boahen, A retinomorphic chip with parallel pathways : Encoding increasing, on, decreasing, and off visual signals, Analog Integrated Circuits and Signal Processing, vol.30, issue.2, pp.121-135, 2002.
DOI : 10.1023/A:1013751627357

A. Benedetti, A. Prati, and N. Scarabottolo, Image convolution on FPGAs: the implementation of a multi-FPGA FIFO structure, Proceedings. 24th EUROMICRO Conference (Cat. No.98EX204), pp.123-130, 1998.
DOI : 10.1109/EURMIC.1998.711786

J. Bauer, N. Sunderhauf, and P. Protzel, COMPARING SEVERAL IMPLEMENTATIONS OF TWO RECENTLY PUBLISHED FEATURE DETECTORS, Proceedings of the International Conference on Intelligent and Autonomous Systems, IAV, p.41, 2007.
DOI : 10.3182/20070903-3-FR-2921.00027

A. Bernardino, J. Santos, and . Victor, Vergence control for robotic heads using log-polar images, Proceedings of IEEE/RSJ International Conference on Intelligent Robots and Systems. IROS '96, 1921.
DOI : 10.1109/IROS.1996.568980

P. Chalimbaud and F. Berry, Embedded active vision system based on an fpga architecture, EURASIP Journal on Embedded Systems, pp.26-26, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00095051

W. Chu and Y. Li, Cost/performance tradeoff of n-select square root implementations Lee : Real-time optical flow calculations on fpga and gpu architectures : A comparison study, Proceedings of the 5th Australasian Computer Architecture Conference Proceedings of the 2008 16th International Symposium on Field-Programmable Custom Computing Machines, pp.9-173, 2000.

B. Cope, Implementation of 2D convolution on FPGA, GPU and CPU. Rapport technique, p.84, 2006.

J. Crowley, O. Riff, and J. Piater, Fast computation of characteristic scale using a half-octave pyramid, Proceedings of the Cognitive Vision Workshop (Cogvis), p.52, 2002.

. Ctc-+-09-]-v, G. Chandrasekhar, D. Takacs, S. Chen, R. Tsai et al., Chog : Compressed histogram of gradients a low bit-rate feature descriptor, Computer Vision and Pattern Recognition, p.42, 2009.

C. R. Dyer, Multiscale image understanding, pp.171-213, 1987.

A. Elouardi, S. Bouaziz, A. Dupret, J. O. Klein, and R. Reynaud, On chip vision system architecture using a CMOS retina, IEEE Intelligent Vehicles Symposium, 2004, pp.206-211, 2004.
DOI : 10.1109/IVS.2004.1336382

F. Fons, M. Fons, and E. Cantó, Run-time self-reconfigurable 2D convolver for adaptive image processing, Microelectronics Journal, vol.42, issue.1, pp.204-217, 2010.
DOI : 10.1016/j.mejo.2010.08.008

L. Fiack, Intégration d'un système de vision robotique d'inspiration biologique sur fpga, Mémoire de projet de Master 2, 2012.

J. Fauqueur, N. Kingsbury, and R. Anderson, Multiscale Keypoint Detection using the Dual-Tree Complex Wavelet Transform, 2006 International Conference on Image Processing, p.42, 2006.
DOI : 10.1109/ICIP.2006.312656

R. French, A power efficient image convolution engine for field programmable gate arrays, MAPLD International Conference, p.91, 2004.

[. Gaisler, Leon processor, leon3 core, p.28

D. Ginhac and J. Dubois, Barthélémy Heyrman et Michel Paindavoine : A high speed programmable focal-plane simd vision chip

S. Granados, E. Ros, R. Rodríguez, and J. Díaz, Visual Processing Platform Based on Artificial Retinas, Proceedings of the 9th international work conference on Artificial neural networks, pp.506-513, 2007.
DOI : 10.1007/978-3-540-73007-1_62

K. Ghosh and S. Sarkar, Bhaumik : A bio-inspired model for multiscale representation of even order gaussian derivatives, Intelligent Sensors, Sensor Networks and Information Processing Conference, 2004.

H. , E. Huck, B. Miramond, and F. Verdier, A Modular SystemC RTOS Model for Embedded Services Exploration, First European Workshop on Design and Architectures for Signal and Image Processing (DASIP), p.69, 2007.
URL : https://hal.archives-ouvertes.fr/hal-00524703

C. Harris, Stephens : A combined corner and edge detection, Proceedings of The Fourth Alvey Vision Conference, pp.147-151, 1988.

M. Ishikawa and T. Komuro, Digital vision chips and high-speed vision systems, 2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185), pp.1-4, 2001.
DOI : 10.1109/VLSIC.2001.934175

. Int and . Intel, Intel atom processor e6x5c series. 45 RÉFÉRENCES [KD09] Nachiket Kapre et André DeHon : Performance comparison of singleprecision spice model-evaluation on fpga, gpu, cell, and multi-core processors, FPL : 2009 International Conference on Field Programmable Logic and Applications. International Conference on Field Programmable Logic and Applications, p.48, 2009.

M. D. Kelly, Edge detection by computer in pictures using planning, Machine Intelligence 6, pp.397-409, 1971.

S. Khatchadourian, Mise en oeuvre d'une architecture de reconnaissance de formes pour la détection de particules à partir d'images atmosphériques, Thèse de doctorat Direction : L. Kessal, J-C. Prévotet, p.37, 2010.

T. Komuro, I. Ishii, and M. Ishikawa, Vision chip architecture using general-purpose processing elements for 1ms vision system, Proceedings of the 1997 Computer Architectures for Machine Perception (CAMP '97), CAMP '97, p.276, 1997.

K. Kurino, M. Nakagawa, T. Kang-wook-lee, Y. Nakamura, K. T. Yamada et al., Smart vision chip fabricated using three dimensional integration technology, NIPS, pp.720-726, 2000.

L. J. Kozlowski, Noise minimization via deep submicron system-on-chip integration in megapixel cmos imaging sensors, Opto-Electronics Review, vol.14, pp.11-18, 2006.

M. Leeser, S. Miller, and H. Yu, Smart Camera Based on Reconfigurable Hardware Enables Diverse Real-Time Applications, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, pp.147-155, 2004.
DOI : 10.1109/FCCM.2004.53

G. David and . Lowe, Object recognition from local scale-invariant features, Proceedings of the International Conference on Computer Vision, pp.1150-1190, 1999.

G. David and . Lowe, Distinctive image features from scale-invariant keypoints, Int. J. Comput. Vision, vol.60, issue.34, pp.91-110, 2004.

B. Luo and Y. Zhang, Hierarchical Classification for Imbalanced Multiple Classes in Machine Vision Inspection, Fourth International Conference on Image and Graphics (ICIG 2007), pp.536-541, 2007.
DOI : 10.1109/ICIG.2007.81

J. Martinez and L. , Altamirano : Fpga-based pipeline architecture to transform cartesian images into foveal images by using a new foveation approach. Reconfigurable Computing and FPGA's, pp.1-10, 2006.

M. Maillard, Formalisation de la perception comme dynamique sensori-motrice : application dans un cadre de reconnaissance d'objets par un robot autonome, Thèse de doctorat, p.21, 2007.

G. De, M. , and L. Benini, On-Chip Communication Architectures : System on Chip Interconnect, p.45, 2008.

A. Muneeb, F. Dias, F. Berry, and J. Sérot, Harnessing a multi-sensor fpga-based smart camera : a virtual processor-based approach, DASIP 2009, pp.135-141, 2009.

M. Maillard, O. Gapenne, P. Gaussier, and L. Hafemeister, Perception as a Dynamical Sensori-Motor Attraction Basin, éditeur : Advances in Artificial Life (8th European Conference , ECAL), volume LNAI 3630 de Lecture Note in Artificial Intelligence, pp.37-46, 2005.
DOI : 10.1007/11553090_5

H. Peter and M. , Obstacle avoidance and navigation in the real world by a seeing robot rover, Thèse de doctorat, p.40, 1980.

A. Martínez, L. M. Reyneri, F. J. Pelayo, S. F. Romero, C. A. Morillas et al., Automatic Generation of Bio-inspired Retina-Like Processing Hardware, international work-conference on artificial neural networks, pp.527-533, 2005.
DOI : 10.1007/11494669_65

K. Mikolajczyk and C. Schmid, Scale & Affine Invariant Interest Point Detectors, International Journal of Computer Vision, vol.60, issue.1, pp.63-86, 1942.
DOI : 10.1023/B:VISI.0000027790.02288.f2

URL : https://hal.archives-ouvertes.fr/inria-00548554

G. Martin and G. Smith, High-Level Synthesis: Past, Present, and Future, IEEE Design & Test of Computers, vol.26, issue.4, pp.18-25, 0114.
DOI : 10.1109/MDT.2009.83

N. Ouerhani, Visual Attention : From Bio-Inspired Modeling to Real-Time Implementation, Thèse de doctorat, Institut de microtechnique de l'université de Neufchâtel, p.14, 2003.

S. Perri, A power efficient image convolution engine for field programmable gate arrays, MAPLD International Conference, p.83, 2003.

N. Roudel, F. Berry, J. Serot, and L. Eck, A New High-Level Methodology for Programming FPGA-Based Smart Camera, 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
DOI : 10.1109/DSD.2010.68

A. Revel, Contrôle d'un robot autonome par approche neuromimétique, Thèse de doctorat, 1997.

. Rob and . Robosoft, Robulab 10 robots

R. Rodríguez-vázquez, R. Domínguez-castro, F. Jiménez-garrido, S. Morillas, J. Listán et al., The Eye-RIS CMOS Vision System, Analog Circuit Design, pp.15-32, 2007.
DOI : 10.1007/978-1-4020-8263-4_2

A. Rodriguez-vazquez, G. Linan-cembrano, L. Carranza, E. Roca-moreno, R. Carmona-galan et al., ACE16k: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCs, IEEE Transactions on Circuits and Systems I: Regular Papers, vol.51, issue.5, pp.851-863, 2004.
DOI : 10.1109/TCSI.2004.827621

T. Rinner, W. Winkler, M. Schriebl, W. Quaritsch, and . Wolf, The evolution from single to pervasive smart cameras, 2008 Second ACM/IEEE International Conference on Distributed Smart Cameras, pp.1-10, 2008.
DOI : 10.1109/ICDSC.2008.4635674

E. L. Schwartz, Spatial mapping in the primate sensory projection: Analytic structure and relevance to perception, Biological Cybernetics, vol.70, issue.4, pp.181-194, 1921.
DOI : 10.1007/BF01885636

S. Shan, W. Gao, B. Cao, and D. Zhao, Illumination normalization for robust face recognition against varying lighting conditions. Analysis and Modeling of Faces and Gestures, IEEE International Workshop on, issue.21, p.157, 2003.

C. Schmid and R. Mohr, Local grayvalue invariants for image retrieval, IEEE Transactions on Pattern Analysis and Machine Intelligence, vol.19, issue.5, pp.530-535, 1997.
DOI : 10.1109/34.589215

URL : https://hal.archives-ouvertes.fr/inria-00548358

S. Schauland, J. Velten, and A. Kummert, Implementation of hardware-optimized 3-d wave digital filters for motion-based object detection in video scenes, 16th European Signal Processing Conference, p.35, 2008.

V. , J. Traver, and A. Bernardino, A review of log-polar imaging for visual perception in robotics, Robotics and Autonomous Systems, vol.58, issue.42, pp.378-398, 2010.

[. Traver and F. Pla, Designing the Lattice for Log-Polar Images
DOI : 10.1007/978-3-540-39966-7_15

I. Ingela-nyström, G. Sanniti-di-baja, and S. Svensson, éditeurs : Discrete Geometry for Computer Imagery, volume 2886 de Lecture Notes in Computer Science, pp.164-173, 2003.

V. , J. Traver, and F. Pla, Log-polar mapping template design : From task-level requirements to geometry parameters, Image Vision Comput, vol.26, pp.1354-1370, 2008.

M. Tistarelli and G. Sandini, On the advantages of polar and log-polar mapping for direct estimation of time-to-impact from optical flow, IEEE Transactions on Pattern Analysis and Machine Intelligence, vol.15, issue.4, pp.401-410, 1921.
DOI : 10.1109/34.206959

W. K. Wong, C. W. Choo, and C. Teh, FPGA Implementation of Log-polar Mapping, 2008 15th International Conference on Mechatronics and Machine Vision in Practice, pp.12-18, 2010.
DOI : 10.1109/MMVIP.2008.4749505

Z. Wei, D. Lee, B. Nelson, and M. Martineau, A Fast and Accurate Tensor-based Optical Flow Algorithm Implemented in FPGA, 2007 IEEE Workshop on Applications of Computer Vision (WACV '07), pp.18-49, 2007.
DOI : 10.1109/WACV.2007.5

X. Wu, P. Lou, and J. Yu, An Embedded Vehicular Controller with ARM and DSP for a Vision-Based AGV, 2008 International Conference on Embedded Software and Systems Symposia, pp.398-403, 2008.
DOI : 10.1109/ICESS.Symposia.2008.11