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Unification des mémoires réparties dans les systèmes hétérogènes

Abstract : Following the loss of Dennard scaling, computing systems have become increasingly heterogeneous by the integration of coprocessors. Thanks to their massively parallel architecture, coprocessors can both speed up processing and increase the energy efficiency of applications. However, this performance improvement through heterogeneity comes at the cost of a hybrid and distributed programming model that makes systems more complex to program. This thesis aims to address the data management problem in heterogeneous systems. Many works have been proposed to address this issue. While they all have different features, most rely on coarse-grained partitioning of data structures into regular blocks. Blocks are transferred before the compute kernels are executed to resolve data dependencies. These works make it possible to efficiently manage regular data structures whose processing generates regular and predictable access patterns. However, scientific applications increasingly use irregular data structures resulting in random and unpredictable data accesses. As illustrated by the High Performance Conjugate Gradient benchmark, the performance of these applications is limited by those of memory and interconnect systems. Thus, the optimization of these applications requires limiting the data exchange between the different memory systems. Shared memory is a convenient paradigm to program such applications by solving the problems of data localization, data transfers orchestration and data coherency. Thanks to their reconfigurable architecture, Field-programmable gate arrays (FPGAs) are particularly suitable for processing irregular applications. Thus, as part of the work of this thesis, we have proposed to study the integration of FPGAs in a Distributed Shared Memory (DSM). This work positioning differs from the state of the art by the ability given to accelerators to initiate access to remote data. To do this, we have proposed a integration model of FPGAs into Software-Distributed Shared Memory (S-DSM). This is based on a proxy system enabling the compute kernels, implementing on the programmable logic of the accelerator, to communicate with the software environment of the S-DSM. We have proposed a programming model for this system that meets the requirements of applications whose randomly access data. To solve the problem of remote data access latency, the programming model relies on a temporal overlay of the transferred data flow with the processed data flow. To do this, it relies on irregular data structures partitioning into blocks of adaptable sizes in order to hide structures irregularities and to be able to prefetch data. We have developed a modeling and simulation tool to validate the proposed system and programming model. General Sparse Matrix-Matrix Multiplication (SpGEMM) and a tsunami simulation code were used as case studies to conduct experiments. They allowed to assess the programming model for two widely used irregular data structures: compressed sparse matrix and unstructured mesh. The obtained results showed that the programming model enables to effectively hide data access latencies and to almost reach the maximum performance allowed by the FPGA local memory bandwidth.
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Submitted on : Monday, March 7, 2022 - 5:46:08 PM
Last modification on : Wednesday, March 9, 2022 - 3:30:25 AM
Long-term archiving on: : Wednesday, June 8, 2022 - 9:14:23 PM


  • HAL Id : tel-03600744, version 1


Erwan Lenormand. Unification des mémoires réparties dans les systèmes hétérogènes. Calcul parallèle, distribué et partagé [cs.DC]. Université Paris-Saclay, 2022. Français. ⟨NNT : 2022UPASG007⟩. ⟨tel-03600744⟩



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