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Habilitation À Diriger Des Recherches Year : 2015

Concurrency in Transactional Memory

Abstract

This document is presented in fulfilment of the degree of \emph{Habilitation \`{a} Diriger des Recherches} and aims at presenting, in a coherent form, my main scientific results, collaborations and supervision of research during the last 8 years in the domain of transactional memory where I have sought to contribute to the advancement of research, and the future perspectives that my contribution leads to. The document comprises three main chapters that are summarized as follows. For the last decade, manufacturers have increased the number of processors, or \emph{cores} in most computational devices rather than their frequency. To increase the performance of applications, one must write \emph{concurrent programs}, programs divided into subroutines that cores can execute simultaneously, a task considered very difficult. My contribution has been to facilitate the adoption of transaction, a synchronization abstraction to simplify concurrent programming. First, I contributed to the integration of transactional memory (TM) in two mainstream programming languages and demonstrated empirically that software TM could leverage multicore and manycore platforms. Second, I defined \emph{concurrency} as a metric capturing the variety of sequences of shared memory accesses a concurrent program exports and exploited this metric to identify a concurrency limitation that is inherent to the transaction abstraction. Third, I proposed a solution to overcome this concurrency limitation, developed a \emph{polymorphic transactional memory} offering multiple transaction models for both expert and novice programmers, and proposed a redesign of a transactional data structure to improve the performance of applications using software transactional memory. My research results open up three research directions related to the systematic comparison of synchronization techniques, the generalization of the structure redesign principles to a larger class of concurrent data structures and the definition of contention that has become a predominant cause of performance drop.
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Dates and versions

tel-01522826 , version 1 (15-05-2017)

Identifiers

  • HAL Id : tel-01522826 , version 1

Cite

Vincent Gramoli. Concurrency in Transactional Memory. Distributed, Parallel, and Cluster Computing [cs.DC]. UPMC - Sorbonne University, 2015. ⟨tel-01522826⟩
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